STM32 Cypress QSPI
A library for communicating with Cypress FL- series QSPI flash memory chips
QSPI Dummy clock configuration

Dummy cycles for SDR, High Performance.

Dummy cycles for SDR, High Performance.

Precondition
Define QSPI_DUMMY_{50 | 80 | 90 | 104} based on the QSPI peripheral clock speed
ex. for a peripheral speed of < 50 MHz, use #define QSPI_DUMMY_50
This should be set in a global location
Return values
CYPRESS_DUMMY_CLOCK_CYCLES_READdummy clock cycles for READ reads
CYPRESS_DUMMY_CLOCK_CYCLES_FASTREADdummy clock cycles for FASTREAD reads
CYPRESS_DUMMY_CLOCK_CYCLES_READ_DUALdummy clock cycles for DUAL reads
CYPRESS_DUMMY_CLOCK_CYCLES_READ_DUALIOdummy clock cycles for DUALIO reads
CYPRESS_DUMMY_CLOCK_CYCLES_READ_QUADdummy clock cycles for QUAD reads
CYPRESS_DUMMY_CLOCK_CYCLES_READ_QUADIOdummy clock cycles for QUADIO reads
CYPRESS_DUMMY_LCLatency code for given speed
Postcondition
User must set CYPRESS_DUMMY_LC in CR1 for any read operations